Research & Development
Leading the next-generation semiconductor materials market through innovative technology development
Research & Development
Enpulse is developing next-generation semiconductor materials technology through continuous R&D investment.
In particular, we have secured global competitiveness in the CMP (Chemical Mechanical Polishing) field and
are supporting our customers' next-generation semiconductor competitiveness.
CMP Core Research Areas
- • CMP pad formulation and material research
- • Semiconductor material analysis & process optimization
- • Customer co-creation on surface control and bespoke solutions
Research Achievements & Patents
- • Advanced material & integrated analysis center in operation
- • Co-development with global partners to expand the IP portfolio
INNOVATION PROGRAMS
Material Science Stack that Powers Enpulse Pads
We synthesize prepolymer, design pore architecture, and orchestrate single-sheet casting to ensure uniform sheets and fast response to customer feedback.
Raw Material Self Design
Own prepolymer synthesis and additive control accelerate iteration cycles and regional localization.
Hybrid Pore System
Combination of solid microspheres + inert gas foaming implements multiple pore sizes and lowers inorganic contamination.
Single Sheet Casting
Continuous feeding, de-molding and temperature-controlled plates drive sheet-to-sheet uniformity.
Why it matters
- Lower defect/scratch pads with superior planarity.
- Rapid customization when customers request new density, groove or polymer targets.
- Eco-friendly options including VDC-free, MOCA-free and bio-based formulations.
R&D Footprint
R&D Center · Raw Material Synthesis · CMP Evaluation Lab
Located at the Yongin R&D Center, integrating casting, CMP evaluation tools, and analytical labs on a single floor.
2025 - 2027
R&D Roadmap & Sustainability Tracks
Four synchronized tracks keep Enpulse ahead of CMP requirements from density control to circularity.
01
Customized Pads
Groove, bottom stack and polymer tuning projects deliver customer-specific CMP recipes.
02
High Removal Rate
V-HT & V-RD series leverage density and fragment control to raise throughput without sacrificing stability.
03
Low Defect
V-IS & V-ID programs pursue softer polymer and optimized porosity for scratch-free wafers.
04
Eco & Circular
Chlorine-free (V series), dual-free (E series), bio-based (B series) plus reclaim/buffing reuse pilots.
PATENT PORTFOLIO
458 filings · 292 registrations
Composition 28% · Property 26% · Pore 19% · Window 14% · Manufacturing 4% · Stack 4% · Groove 3% · Other 2%
ECO PATENTS
30+
VDC-free, MOCA-free, dual-free, biomass & recycling patents reinforcing ESG commitments.